Research Statement

As chip-multiprocessors (CMPs) are becoming the dominant vehicle for general-purpose processing, the issues of efficient evaluation, convenient program and quick debug are becoming more and more important. Our current research mainly focuses on simulation acceleration, software debug and programming model. Our research also involves different optimizing techniques, such as phase behavior analysis and dynamic scheduling etc.

Recent News

  • [Publication] November, 2012, Our Paper “Multi-level Phase Analysis for Sampling Simulation.” has been accepted by Design, Automation & Test in Europe Conference & Exhibition (DATE 2013).
  • [Publication] May, 2012, Our Paper “Adaptive Pipeline Parallelism for Image Feature Extraction Algorithms.” has been accepted by The 41st International Conference on Parallel Processing (ICPP 2012).
  • [Publication] April, 2012, Our Paper “Improving Dynamic Prediction Accuracy Through Multi-level Phase Analysis.” has been accepted by the 2012 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2012).
  • [Publicacion] Feburary, 2012, Our Paper “Transformer: A Functional-Driven Cycle-Accurate Multicore Simulator.” has been accepted by 49th Design Automation Conference (DAC 2012).

Members

Faculty

Ph.D Students

Master Students

Undergraduate Students

Alumni and their first positions

  • Feiwen Zhu, Software Engineer, Nvidia
  • Yibin Hu, Software Engineer, National Instruments
  • Xun Li, Ph.D Student, University of University of California, Santa Barbara
  • Tao Bao, Ph.D Student, Purdue University
  • Junpu Chen, Software Engineer, Microsoft
  • Yao Zhang, Software Engineer, Morgan
  • Qiang Yan, Ph.D Student, Singapore Management University
  • Qin Wang, Software Engineer, Synopsys
  • Jie Yan, Software Engineer, Synopsys
  • Lili Liu, Software Engineer, Huawei
  • Xiaoxi Yang, Assistant Professor, Chanzhou College of Information Technology
  • Ying Yuan, Master Student, Carnegie Mellon University

Publications

Conference

2013

              SIGMETRICS      
Understanding Architectural Characteristics of Multimedia Retrieval Workloads
Chen Dai, Chao Lv, Jiaxin Li, Weihua Zhang
To appear in The ACM SIGMETRICS 2013 (POSTER), Carnegie Mellon University, Pittsburgh, PA, June 17 - 21, 2013
              DATE                     
Multi-level Phase Analysis for Sampling Simulation
Jiaxin Li, Weihua Zhang, Haibo Chen and Binyu Zang
To appear in Design, Automation & Test in Europe Conference & Exhibition (DATE 2013). Grenoble, France, March, 2013

2012

              ICPP                     
Adaptive Pipeline Parallelism for Image Feature Extraction Algorithms
Peng Chen, Donglei Yang, Weihua Zhang, Yi Li, Haibo Chen and Binyu Zang
In the 41st International Conference on Parallel Processing (ICPP 2012). PA, USA, September, 2012
              LCTES                   
Improving Dynamic Prediction Accuracy Through Multi-level Phase Analysis
Zhenman Fang, Jiaxin Li, Weihua Zhang, Yi Li, Haibo Chen, Binyu Zang
In proceedings of the ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2012)
              DAC                       
Transformer: A Functional-Driven Cycle-Accurate Multicore Simulator
Zhenman Fang, Qinghao Min, Keyong Zhou, Yi Lu, Yibin Hu, Weihua Zhang, Haibo Chen, Jian Li, Binyu Zang
The 49th Design Automation Conference (DAC 2012) San Francisco, USA, June, 2012
              GPGPU                 
A GPU-based High-throughput Image Retrieval AlgorithmA GPU-based High-throughput Image Retrieval Algorithm
Feiwen Zhu, Peng Chen, Donglei Yang, Weihua Zhang, Haibo Chen, Binyu Zang
The Fifth Workshop on General Purpose Processing on Graphics Processing Units (GPGPU 5) collocated with ASPLOS 2012
              VEE                       
Swift: A Register-based JIT Compiler for Embedded JVMs
Yuan Zhang, Min Yang, Bo Zhou, Zhemin Yang, Weihua Zhang, Binyu Zang
The 8th Annual International Conference on Virtual Execution Environments (VEE 2012). London, United Kingdom

2011

              PPOPP                   
COREMU: a Scalable and Portable Parallel Full-system Emulator
Zhaoguo Wang, Ran Liu, Yufei Chen, Xi Wu, Haibo Chen, Weihua Zhang, Binyu Zang
ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP 2011). San Antonio, USA, February, 2011
              APPT                     
A parallel analysis on scale invariant feature transform (SIFT) algorithm
Donglei Yang, Lili Liu, Feiwen Zhu, and Weihua Zhang
The 9th International Symposium on Advanced Parallel Processing Technologies (APPT 2011). Shanghai, China
              ISPASS                 
A Comprehensive Analysis and Parallelization of an Image Retrieval Algorithm
Zhenman Fang, Donglei Yang, Weihua Zhang, Haibo Chen, Binyu Zang
IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2011). Austin TX, USA, April, 2011

2009

              PACT                   
Hierarchical Phase Analysis for Sampling Simulations
Weihua Zhang, Qiang Yan, Binyu Zang, Pen-Chung Yew
The 18th International Conference on Parallel Architectures and Compilation Techniques (PACT 2009), POSTER
              SAC                     
Optimizing Techniques for Saturated Arithmetic with First-Order Linear Recurrence
Weihua Zhang, Lili Liu, Chen Zhang, Hongjiang Zhang, Binyu Zang and Chuanqi Zhu
The 24th Annual ACM Symposium on Applied Computing (SAC 2009) Programming Language Track. Honolulu, Hawaii, USA
              APPT                   
Evaluating SPLASH-2 benchmarks using Hadoop MapReduce
Shengkai Zhu, Zhiwei Xiao, Haibo Chen, Rong Chen, Weihua Zhang and Binyu Zang
The 8th international Conference on Advanced Parallel Processing Technologies (APPT 2009). Rapperswil, Switzerland. August, 2009

2007

              LCTES                 
Optimizing Software Cache Performance of PacketProcessing Applications
Qin Wang, Junpu Chen, Weihua Zhang and Binyu Zang
In proceedings of the 2007 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2007)
              PACT                   
Optimizing Bandwidth Constraint through Register Interconnection for Stream Processors
Weihua Zhang, Tao Bao, Binyu Zang and Chuanqi Zhu
The 6h International Conference on Parallel Architectures and Compilation Techniques (PACT 2007), Poster, Brasov, Romania
              LCTES                 
Optimizing Compiler for Shared-Memory Multiple SIMD Architecture
Weihua Zhang, Xinglong Qian, Ye Wang, Binyu Zang and Chuanqi Zhu
In proceedings of the 2006 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2006)
              LCPC                   
Data Pipeline Optimization for Shared Memory Multiple-SIMD Architecture
Weihua Zhang, Tao Bao, Binyu Zang and Chuanqi Zhu
The 19th InternationalWorkshop on Languages and Compilers for Parallel Computing (LCPC 2006)

Journal

  • Weihua Zhang, Binyu Zang and Chuanqi Zhu. “Optimizing the simd parallelism through bitwidth analysis”. Chinese Journal of Computers.
  • Weihua Zhang, Binyu Zang. “Shared-memory Multiple SIMD Architecture and Compiler Techniques”. Chinese Journal of Computers, 3(1), 2009, 18-25
  • Qiang Yan, Weihua Zhang, Lili Liu, Binyu Zang and Chuanqi Zhu. “A Metadata-Driven Optimization for Sampling Simulation”. Chinese Journal of Computers, 31(11), 2008, 400-410
  • Weihua Zhang, Peng Wang, Binyu Zang and Chuanqi Zhu. “An Affine Partition Algorithm Based on Representative Element”. Chinese Journal of Computers, 31(3), 2008, 400-410
  • Weihua Zhang Binyu Zang, Xinglong Qian, Ye Wang and Chuanqi Zhu. “Instruction Schedule based on Shared Vector Algorithm for Two-Dimensional SIMD Architecture”. Chinese Journal of Computers 29(10), 2006, 1740-1749.
  • Weihua Zhang, Ye Wang, Binyu Zang and Chuanqi Zhu. “A model of reconfigurable computing system”. Mini-Micro Systems (In Chinese). 27(7), 2006, 1245-1249